市場調査レポート

アレイICパッケージング市場

The Array IC Packaging Market - 2013 Edition

発行 New Venture Research 商品コード 289103
出版日 ページ情報 英文 110 Pages
納期: 即日から翌営業日
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アレイICパッケージング市場 The Array IC Packaging Market - 2013 Edition
出版日: 2013年10月30日 ページ情報: 英文 110 Pages
概要

当レポートでは、アレイICパッケージング市場について調査し、産業の概要、産業の経済状況、および市場予測のサマリーを提供しており、概略下記の構成でお届けいたします。

第1章 イントロダクション

第2章 エグゼクティブサマリー

第3章 産業の現状

  • 経済概要
  • 産業概要

第4章 BGA/LGA/CGA および FBGA/FLGAパッケージソリューション

  • パッケージタイプ・I/Oカウント
  • 新製品投入:京セラ, SLC Technologies および IBM
  • BGA, LGA, CGA, FBGAの予測およびFLGAパッケージソリューション

第5章 クワッドフラットパック(QFP)およびファンインQFNパッケージ

  • 概要
  • 製品紹介
  • 市場予測

第6章 ウェハーレベルのパッケージおよびファンアウトWLP

  • WLPもしくはフリップチップオンボード?
  • レイヤー
  • WLPのメリット
  • アンダーフィルに適用されたウェハー
  • ウェハーテスト
  • PCBへのコンプライアンス
  • 課題・ソリューション
  • WLPのコスト削減
  • 現在のアプリケーション
  • WLPの多用途性
  • ファンアウトWLPの課題
  • 新製品投入
    • Deca Technologies
    • J-Devices Corporation
    • NANIUM S.A.
    • STATS ChipPAC Ltd.
    • Teramikros, Inc.

付録A:ウェブアドレスガイド

付録B:用語

図表

目次

An Extension of the Most Comprehensive Report Available On The Global IC Packaging Industry

Small form factor, high speed and performance, and high bandwidth capability with low battery consumption are desired traits for many packaging solutions for integrated circuits (ICs). High demand for handheld and high performance electronic devices is the driving factor behind the IC packaging needs.

IC packages with an array layout, as opposed to a perimeter layout, allow for more I/O density in a smaller form factor, meeting the needs outlined above. Thus demand for array IC packages is on the rise, as additional I/O connections are fit beneath the package than traditional leadframe packages, providing them with form factor benefits. BGA and FBGA package solutions also reach into I/O levels which are unreachable by traditional leadframe packages, as the substrate can be enlarged to fit a large number of solder balls, land pads, or columns beneath it to attach to the PCB.

This new report, The Array IC Packaging Market - 2013 Edition, encompasses the array IC packages BGA, LGA, CGA, FBGA, FLGA, Fan-in QFN, WLP and Fan-out WLPs. Array IC packages can accommodate additional I/O connections beneath the package to connect to the printed circuit board (PCB) when compared to leadframe packages with only a single row of interconnections around the periphery of the package.

This enables:

  • A smaller footprint on the PCB
  • Shorter traces through the package to the PCB,
  • thus higher speed and improved performance
  • Higher bandwidth capability
  • Less power consumption, particularly important in
  • battery-operated devices

Chapter 4 of this report covers BGAs and FBGAs solutions. BGAs and FBGAs do not have to have solder balls beneath the package substrate as the package can have just land pads or columns instead of balls for the second level interconnection, which connects the package to the printed circuit board. Forecasts in terms of units and revenue are provided for BGA, LGA, CGA, FBGA, and FLGA package solutions including a wide range of I/O counts of 3-18, 20-32, 34-100, 102-304, 308-999, and 1,000 and up.

Chapter 5 examines the Quad Flatpack No-lead, or QFN market, with emphasis on the Fan-in QFN. The Fan-in QFN has additional rows on this leadframe package, turning it into a leadframe version of an array IC package, and one that can reach even further into the market which would otherwise be covered by the larger QFP, but with a smaller form factor. Additional rows are "Fanned-in" from the traditional perimeter-style leadframe, making this chip scale package unique.

Chapter 6 contains information on Wafer-Level Packages, or WLPs, which are the smallest package solution on the market, being die sized. This unique package is formed while the die is still part of an uncut wafer, the only package to be created or assembled in this manner. WLPs are array packages by nature, but since all the solder balls or bumps then must fit beneath the die itself, this limits the number of I/O which is on these packages.

The solution to this is the Reconfigured or Fan-out Wafer- Level Packages (Fan-out WLPs), for which the available surface available for I/O interface to the PCB is expanded beyond the perimeter of the die by virtue of a backside overmold. All these processes are done on an uncut wafer, so that manufacturing efficiencies are maximized.

The Array IC Packaging Market - 2013 Edition will provide you with an effective and economical tool for assessing the future of this market.

Report Highlights

  • Industry Overview
  • The Economic State of the Industry
  • Summary of Market Forecasts, 2012-2017
    • BGA/LGA/CGA and FBGA/FLGA Package Solutions
    • Quad Flatpack No-Lead and Fan-in QFN Packages
    • Wafer-Level Packages and Fan-out WLPs

Table of Contents

Chapter 1: Introduction

Chapter 2: Executive Summary

Chapter 3: State of the Industry

  • Economic Overview
  • Industry Overview

Chapter 4: BGA/LGA/CGA and FBGA/Package Solutions, 2012 - 2017

Package Types:

  • BGA/LBGA
  • BGA/LGA/CGA
  • BGA/LGA
  • BGA/LGA/CGA
  • Total BGA/LGA/CGA
  • FBGA/FLGA
  • FBGA/FLGA
  • FBGA/FLGA
  • FBGA/FLGA
  • FBGA/FLGA
  • FBGA/FLGA
  • Total FBGA/FLGA

I/O Count:

  • 34-100
  • 104-304
  • 308-999
  • +1000
  • 4-18
  • 20-32
  • 34-100
  • 104-304
  • 308-999
  • +1000
  • New Product Introductions
  • Kyocera, SLC Technologies and IBM
  • Forecasts for BGA, LGA, CGA, FBGA and
  • FLGA Package Solutions

Chapter 5: Quad Flat Pack and Fan-in QFN Packages

  • Overview
  • Product Introductions
  • Market Forecasts for QFN Fan-in QFN Packages

Chapter 6: Wafer-Level Packages and Fan-out

  • WLPs
  • WLP or Flip Chip on Board?
  • The Layers
  • Benefits of WLP
  • Wafer Applied Underfill
  • Wafer Testing
  • Compliance to the PCB
  • Issues and Solutions
  • Cost Reduction for WLPs
  • Current Applications
  • Versatility of the WLP
  • Fan-out WLP Challenges
  • New Product Introductions
    • Deca Technologies
    • J-Devices Corporation
    • NANIUM S.A.
    • STATS ChipPAC Ltd.
    • Teramikros, Inc.

Appendix A: Web Address Guide

Appendix B: Glossary of Terms

List of Tables

  • Table 4-1: BGA / LGA 34-100 I/O Package Units, 2012-2017
  • Table 4-2: BGA / LGA / CGA 104-304 I/O Package Units, 2012-2017
  • Table 4-3: BGA / LGA 308-999 I/O Package Units, 2012-2017
  • Table 4-4: BGA / LGA 1,000+ I/O Package Units, 2012-2017
  • Table 4-5: BGA / LGA / CGR Package Units, 2012-2017
  • Table 4-6: FBGA / FLGA 4-18 I/O Package Units, 2012-2017
  • Table 4-7: FBGA / FLGA 20-32 I/O Package Units, 2012-2017
  • Table 4-8: FBGA / FLGA 34-100 I/O Package Units, 2012-2017
  • Table 4-9: FBGA / FLGA 104-304 I/O Package Units, 2012-2017
  • Table 4-10: FBGA / FLGA 308-999 I/O Package Units, 2012-2017
  • Table 4-11: FBGA / FLGA 1,000 + I/O Package Units, 2012-2017
  • Figure 4-12: FBGA / FLGA 1,000 + I/O Units by Percent, 2012
  • Table 4-13: FBGA / FLGA Package Units, 2012-2017
  • Table 5-1: Fan-in QFN/QFP Units, 2012-2017
  • Table 5-2: Fan-in QFN Units, 2012-2017
  • Table 6-1: WLP Forecast, 2012-2017
  • Table 6-2: Fan-out WLP Forecast, 2012-2017

List of Figures

  • Figure 4-1: CSP on Test Card
  • Figure 4-2: BGA / LGA 34-100 I/O Units, 2012
  • Figure 4-3: BGA / LGA / CGA 104-304 I/O Units, 2012
  • Figure 4-4: BGA / LGA 308-999 I/O Units, 2012
  • Figure 4-5: BGA / LGA 1.000+ I/O Units, 2012
  • Figure 4-6: BGA / LGA / CGR Units, 2012 vs. 2017
  • Figure 4-7: FBGA / FLGA 4-18 I/O Units, 2012
  • Figure 4-8: FBGA / FLGA 20-32 I/O Units, 2012
  • Figure 4-9: FBGA / FLGA 34-100 I/O Units, 2012
  • Figure 4-10: FBGA / FLGA 104-304 I/O Units, 2012
  • Figure 4-11: FBGA / FLGA 308-999 I/O Units, 2012
  • Figure 4-12: FBGA / FLGA 1,000 + I/O Units, 2012
  • Figure 5-1: QFN and Fan-in QFN Units
  • Figure 5-2: QFN and Fan-in QFN Revenue
  • Figure 6-1: Process Steps of Redistribution
  • Figure 6-2: Adaptive Patting Process Flow
  • Figure 6-3: Adaptive Pattern Design
  • Figure 6-4: Fan-out Package With Adaptive Pattern
  • Figure 6-5: WFOP Final Package
  • Figure 6-6: WFOP Package Drawing
  • Figure 6-7: WFOP Solder Ball Attachment
  • Figure 6-8: 3-D Stacked Version of the WFOP
  • Figure 6-9: Two Layer RDL Stack-up
  • Figure 6-10: WLP and Fan-out WLP Unit Growth
  • Figure 6-11: WLP and Fan-out WLP Revenue Growth
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