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最先端ソリッドステートメモリーシステムおよび製品:新しい不揮発性メモリーの技術・産業動向・市場分析

Advanced Solid-State Memory Systems and Products: Emerging Non-Volatile Memory Technologies, Industry Trends and Market Analysis

発行 Innovative Research and Products (iRAP) 商品コード 189229
出版日 ページ情報 英文 146 Pages
納期: 即日から翌営業日
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最先端ソリッドステートメモリーシステムおよび製品:新しい不揮発性メモリーの技術・産業動向・市場分析 Advanced Solid-State Memory Systems and Products: Emerging Non-Volatile Memory Technologies, Industry Trends and Market Analysis
出版日: 2011年04月30日 ページ情報: 英文 146 Pages
概要

2010年から2015年にかけての世界の新しい不揮発性ランダムアクセスメモリー製品市場は、69%の年間平均成長率で推移し、2015年には1億5,900万ドルの市場規模に成長すると予測されています。

当レポートでは、7タイプの新しい不揮発性メモリー技術(FERAM、PRAM、MRAM、RRAM、ZRAM、量子ドットRAM・ポリマープリンテッドメモリー)に特に焦点を当て、技術概要・技術の進化の動向、新しい不揮発性メモリー製品のアプリケーション、アプリケーション区分・技術区分別の市場規模実績・予測(〜2015年)、詳細な特許分析、主要企業のプロファイルなどをまとめ、概略下記の構成でお届けいたします。

イントロダクション

エグゼクティブサマリー

産業概要

  • 主要製造業者

技術概要

  • 現在の不揮発性メモリー
  • 新しい不揮発性メモリー
  • 技術タイプ
  • 新しい不揮発性ランダムアクセスメモリー技術の進化
  • 新しい不揮発性ランダムアクセスメモリーの概要

新しい不揮発性メモリー製品のアプリケーション

  • ストレージクラスメモリー
  • スマートエアバッグ
  • 耐放射線性強化メモリーのアプリケーション
  • RFID
  • スマートフォン
  • プリンテッドメモリープラットフォーム
  • 組込みメモリー

産業構造・市場

  • 提携・統合
  • 価格構造

世界市場・地域のシェア

  • 世界市場:アプリケーション別
  • 世界市場:技術別
  • 地域別市場

特許・特許分析

企業プロファイル

付録

目次
Product Code: ET-114

Abstract

The ideal semiconductor memory for future silicon integrated circuits unifies the qualities of the different memory technologies of today. It should have the high speed of static random access memory (SRAM), the non-volatility of flash, and the density of dynamic random access memory (DRAM). In addition, it should be low in cost and scalable to nanometer dimensions. Flash memories are currently used as non-volatile memory in stand-alone and embedded chips with great commercial success. However, flash does not qualify as an ideal memory, owing to its relatively long programming time (>10 µs) and limited cycle endurance. Furthermore, the high programming voltages (>10 V) complicate scaling down to nanometer cell sizes.

Today' s dominant solid-state memory technologies - SRAM, DRAM, and flash - have been around for a long time, with Flash the youngest, at 23 years. Their longevity can be explained in part by mutually beneficial differentiation. Each technology does a single thing very well, but many systems need all three memory types to deliver overall good performance at reasonable cost. However, the gain from differentiation comes at the cost of increased system and fabrication complexity, particularly in so-called embedded applications, where an entire electronic system is implemented on a single chip, with SRAM, DRAM and flash often used side by side.

All three technologies have advantages and disadvantages. SRAM has excellent read and write speeds, integrates readily into the process technology of embedded applications, and requires little power for data retention. However, its large cell size (a typical memory bit requires six transistors) makes it impractical for embedded applications that require a lot of memory. Embedded SRAM is used for cache memory in microprocessors, where high speed is more important than large amounts of memory.

DRAM uses a single transistor and a storage capacitor per cell, and thus it provides a denser architecture than SRAM, at the expense of increased embedded process complexity. Because the stored charge tends to leak out of the capacitor, DRAM requires constant power to refresh its bit state every few milliseconds. Because of its high power consumption, large amounts of DRAM are impractical for portable electronics with limited battery life.

In contrast to static and dynamic RAM, flash memory offers nonvolatile data storage; that is, its information is not lost when the power is turned off. Non-volatility is highly desirable in portable electronics, because nonvolatile data retention does not consume any battery power. Flash also has high density and moderately fast read access time, but its write mode is too slow and its write endurance far too limited for many applications. In addition, embedded flash needs its own high-voltage drivers, complicating the design and manufacturing process.

For some time, researchers have tried to devise non-volatile alternatives to flash. The goal is a "universal memory" that combines the best attributes of SRAM, DRAM, and flash. Such a memory would eliminate the need for multiple memories in many applications, would improve system performance and reliability by avoiding data transfer between multiple memories, and would reduce overall system cost

STUDY GOAL AND OBJECTIVES

The main reason for growing commitments to emerging non-volatile random access memory (NVRAM) is that scaling has now become a serious issue for the memory industry. Leakage is a major hurdle at 65nm and beyond. Three-dimensional structures offer one solution, but there is a limit on how far one can go in this technology. Similarly, SRAM makers have largely abandoned large 6T cells in portable devices in favor of 1T pseudo-SRAM (PSRAM). But again, this is only a holding action until something better comes along. Flash has a serious architectural scaling problem that seems likely to become critical well below 90nm. Such problems are making both semiconductor firms and OEMs take emerging memories much more seriously. Not only are many of these new technologies inherently more scalable, but also they seem well suited to the next generation of mobile computing and communications that will demand high capacity memories capable of storing and rapidly accessing video and large databases without overburdening battery power sources. In light of such issues, emerging memory solutions seem to be a key technology.

Ferroelectric RAM (FERAM or F-RAM), magnetic RAM (MRAM), and other next-generation technologies are all attempts to develop the "perfect" memory - one that is non-volatile and whose bits can be fully altered, with ultra-fast read and write rates and an infinite number of rewrite cycles. None of them succeeds in all areas, but all of them make key advancements in at least some of these important memory characteristics.

This study has identified and focused on seven emerging non-volatile memory technologies such as FERAM, phase change random access memory (PCM, PC-RAM, PRAM, OUM), magneto-resistive RAM (MRAM, STT RAM, Race Track Memory), resistance switching RAM (RRAM, ReRAM, CB-RAM, PMC-RAM, Nanobridge RAM CMOx, memistors), zero capacitor (ZRAM), quantum dot RAM and polymer printed memory.

This study focuses on emerging non-volatile random access memory products, providing market data about the size and growth of the application segments and new developments, including a detailed patent analysis, company profiles and industry trends. Another goal of this report is to provide a detailed and comprehensive multi-client study of the market in North America, Europe, Japan, China, India, Korea and the rest of the world (ROW) for potential future emerging non-volatile random access memory products and business opportunities.

The objectives include thorough coverage of the underlying economic issues driving the current solid-state memory business, as well as assessments of new, advanced emerging non-volatile random access memory products that companies are developing. Another important objective is to provide realistic market data and forecasts for emerging memory products. This study provides the most thorough and up-to-date assessment that can be found anywhere on the subject. It also provides extensive quantification of the many important facets of market developments in emerging non-volatile random access memory products in the world. This, in turn, contributes to the determination of what kinds of strategic responses companies might adopt in order to compete in this dynamic market.

REASONS FOR DOING THE STUDY

Memory design has seen a number of trends over the years. Process technology has steadily reduced its minimum feature size. A wide variety of techniques has been developed to improve packing-density. A myriad of technology/circuit/system optimizations have been created to improve performance and reduce power dissipation. In addition, emerging technologies such as three-dimensional (3D) chip stacking and new physical memory mechanisms are pushing the memory.

Recent market trends have indicated that commercialized or near-commercialized circuits are optimized across speed, density, power efficiency and manufacturability. Flash memory is not suited to all applications, having its own problems with random access time, bit alterability, and write cycling. With the increasing need to lower power consumption with zero-power standby systems, observers are predicting that the time has come for alternative technologies to capture at least some share in specific markets such as automotive smart airbags, high-end mobile phones, and RFID tags. An embedded non-volatile memory with superior performance to flash could see widespread adoption in system-on-chip (SoC) applications such as smart cards and microcontrollers.

These new emerging non-volatile random access memory products address the urgent need in some specific and small-form devices. Therefore, iRAP felt a need to do a detailed technology update and market analysis in this industry.

CONTRIBUTIONS OF THE STUDY

This study is intended to benefit existing and future manufacturers of solid-state memories who seek to expand revenues and market opportunities by moving into new technologies such as emerging non-volatile random access memory products which are positioned to become a preferred solution for many applications, such as automotive (e.g., smart airbags), industrial automation, transportation, harsh operating environments and extreme temperature range, instrumentation, medical equipment, industrial microcontrollers, radio frequency identification (RFID), electronic metering and radiation-hardened applications in consumer, military and aerospace markets.

The study also provides the most complete account currently available in a multi-client format of emerging non-volatile random access memory products growth in North America, Europe, Japan, China, and the rest of the world. This report provides the most thorough and up-to-date assessment that can be found anywhere on the subject. The study also provides an extensive quantification of the many important facets of market developments in emerging markets for new generation non-volatile random access memory products, especially in countries such as China

SCOPE AND FORMAT

The market data contained in this report quantify opportunities for emerging non-volatile random access memory products. In addition to product types, the report also covers many issues concerning the merits and future prospects of the emerging non-volatile random access memory products business, including corporate strategies, information technologies and the means for providing these highly advanced products and service offerings. It also covers in detail the economic and technological issues regarded by many as critical to the industry' s current state of change. The report provides a review of the emerging non-volatile random access memory products industry and its structure, as well as the many companies involved in providing these products. The competitive positions of the main market players and the strategic options they face are also discussed, along with such competitive factors as marketing, distribution and operations.

TO WHOM THE STUDY CATERS

The study will benefit existing manufacturers of solid-state memory who seek to expand revenues and market opportunities by growing into the new technology of emerging non-volatile random access memory products, which are now positioned to become a preferred solution for many types of RFID tags, smart cards, high-end mobile phones, smart automotive airbags, etc.

Audiences for this study include marketing executives, business unit managers and other decision makers in solid-state memory companies themselves, as well as in companies peripheral to this business.

REPORT SUMMARY

Solid-state memories read and write data with great speed, enabling swift processing. High-performance versions, such as static and dynamic random access memory (SRAM and DRAM, respectively), use the electronic state of transistors and capacitors to store data bits. These chips lose their data, however, when the computer powers down - or crashes. Currently, solid-state memories constitute a market of over $50 billion, while the non-volatile segment is much smaller.

A few computers use non-volatile chips, which retain data when the power is off, as a solid-state drive in place of a hard disc drive (HDD). The now ubiquitous smart cell phones and other handheld devices also use non-volatile memory, but there is a trade-off between cost and performance. The cheapest non-volatile memory is flash memory, which, among other uses, is the basis of the little flash drives that people have hanging from their key rings. Flash memory, however, is slow and unreliable in comparison with other memory chips. Each time the high-voltage pulse (the "flash" of the name) writes a memory cell, the cell is damaged; it becomes unusable after only perhaps 10,000 writing operations. Nevertheless, because of its low cost, flash memory has become a dominant memory technology, particularly for applications in which the data will not be changed very often.

Industry estimates showed the DRAM market to be as much as $40 billion in 2010. However, the computing world is crying out for a memory chip with high data density that is also cheap, fast, reliable and non-volatile. With such a memory, computing devices would become much simpler and smaller, more reliable, faster and less energy consuming. Research groups around the world are investigating several approaches to meet this demand, including systems based on emerging non-volatile random access memory products.

Besides computers, today' s portable electronics have become computationally intensive devices as the user interface has migrated to a fully multimedia experience. To provide the performance required for these applications, the portable electronics designer uses multiple types of memories: a medium-speed random access memory for continuously changing data, a high-speed memory for caching instructions to the CPU, and a slower, non-volatile memory for long-term information storage when the power is removed. Combining all of these memory types into a single memory has been a long-standing goal of the semiconductor industry.

It is highly likely that different alternatives are needed for different application segments of the markets, and a good match has to be found between solid-state memory product requirements and technology capabilities.

Seven emerging non-volatile memory technologies such as ferromagnetic RAM (FeRAM or F-RAM), phase change random access memory (PCM, PC-RAM, PRAM, OUM), magneto-resistive RAM (MRAM, STT RAM, race track memory), resistance switching RAM (RRAM, ReRAM, CB-RAM, PMC-RAM, nano-bridge RAM CMOx, memistors), zero capacitor (ZRAM), quantum dot RAM and polymer printed memory are poised as possible candidate to become the successor of flash memory. This is thanks to the improved performance in direct write, bit granularity, better endurance, read access time and write throughput.

Major findings of this report are:

  • The 2010 global market for emerging non-volatile random access memory products was projected to have reached $115 million. This market will increase to $1,590 million by 2015 showing an average annual growth rate of 69% per year from 2010 to 2015.
  • Of the six major regions surveyed for the period, North America captured about 42% of the market in 2010, followed by Europe at 36%, and the rest of the world (ROW) with 22%, dominated by Japan, Korea and China.
  • The market for emerging non-volatile random access memory used as an embedded system on chip SOC cards in 2010 will be highest with more 50% of the market. This will be followed by distant market share for RFID tags used in goods which are transported by high-speed detection conveyors, smart airbags used in automobiles, radiation-hardened memory in aerospace and nuclear installations, printed memory platforms (such as smart cards, games, sensors, display, storage-class memory network) and high end smart mobile phones.
  • Commercial uses of these new breeds of NV-RAM have been very slow to appear because of the rapid reduction of per-bit costs of conventional flash memory technologies already in the market. However, these new technologies are sure to capture some specific markets for lower power or zero stand-by system implementation as "green" technology grows.
  • Among the seven emerging non-volatile random access memory technologies covered in this report, in 2010 the potential market for zero capacitor (ZRAM) is highest. The polymer printed memory market in 2010 will be next highest, followed by ferromagnetic RAM as a distant third.
  • In 2015, phase change memory (PCM, PC-RAM, PRAM, OUM) will have the highest market share. FeRAM will be next highest, followed by zero capacitor RAM (ZRAM).
  • MRAM promises a high capacity, next-generation memory that can replace SRAM/flash combos and battery-backed up RAM as well as supplying improved non-volatile memory solutions for high-end mobile products. MRAM is already in the sampling stage.

Table of Contents

INTRODUCTION

  • STUDY GOAL AND OBJECTIVES
  • REASONS FOR DOING THE STUDY
  • Contributions of the study
  • SCOPE AND FORMAT
  • METHODOLOGy
  • information sources
  • TO WHOM THE STUDY CATERS
  • Author' s Credentials

executive summary

  • summary table Global market for emerging non-volatile random access memory products by region through 2015
  • SUMMARY FIGURE Global market FOR emerging non-volatile random access memory products by region, 2010 and 2015

Industry overview

  • LEADING MANUFACTURERS
    • LEADING MANUFACTURERS (continued)
  • FIGURE 1 emerging non-volatile random access meory technology scenArio in 2010

Technology Overview

  • Current non-volatile memories
  • Emerging NVM
    • Emerging NVM (continued)
  • TYPES OF TECHNOLOGIES
  • TABLE 1 comparison of emerging non-volatile random access memories
  • table 2 definitions and explanation of terminologies applicable to emerging non-volatile memories
  • Table 2 (continued)
  • Table 2 (continued)
  • Table 2 (continued)
  • Table 2 (continued)
  • Table 2 (continued)
    • EVOLUTION OF EMERGING NON-VOLATILE RANDOM ACCESS MEMORY TECHNOLOGIES
    • Background of Semiconductor Memory
    • Memory Usage and Applications
    • Memory Market Segments
    • Non-volatile Semiconductor Memory (NVSM)/Storage-Class Memory (SCM) versus Emerging Non-Volatile Memories
    • Emerging Non-Volatile Memory Technologies
      • Emerging Non-Volatile Memory Technologies (continued)
    • Advantages Of Emerging NVMs Over Conventional NVMs
  • FIGURE 2 floating-gate polysilicon (flash) architecture
  • Description Of Emerging Non-Volatile Random Access Memories
    • Ferromagnetic Random Access Memory (FERAM)
  • figure 3 FERROELECTRIC CRYSTALS SHOWING MOBILE ATOM MOVING IN DIRECTION OF APPLIED FIELD SETTING A DIGITAL STATE-0
    • Phase Change Random Access Memory (PCRAM)
  • figure 4 A VIEW OF PHASE CHANGE MEMORY
  • figure 5 OPERATION OF PCRAM
  • figure 6 SET AND RESET OPERATION IN PCM
    • Characteristics
    • Benefits
    • Magneto-resistive Random Access Memory (MRAM)
    • Density
    • Power Consumption
    • Speed
    • Overall
  • figure 7 OPERATION of Magneto-resistive Random Access Memory
    • Racetrack Memory: A Variant of MRAM
  • figure 8 OPErATION of racetrack random access memory
    • Comparison to Other Memory Devices
    • Development Difficulties
    • Resistive Switching Random Access Memory (RRAM)
  • figure 9 CONSTUCTION OF RESISTIVE RANDOM ACCESS MEMORY
    • Resistive Switching Random Access Memory (RRAM)
    • A Variant of RRAM: Programmable Metallization Cell (PMC)
  • CBRAM versus RRAM
    • Comparisons
    • Current Status
    • CMOx: A Variant of RRAM
    • Conductive Metal Oxides
  • Nano-RAM: A Variant of RRAM
  • figure 10 architecture of nano random access memory
    • Advantages of NRAM
    • Comparison with Other Proposed Systems
    • Memristors: A Variant of RRAM
  • Zero Capacitor Random Access Memory
  • Quantum Dot Random Access Memory
  • Polymer Printed Memory
  • Figure 11 A view of ferroelectric polymer memory
    • Polymer Printed Memory (continued)
    • Polymer Printed Memory (continued)

APPLICATIONS OF EMERGING NON-VOLATILE MEMORY PRODUCTS

  • Storage-Class Memory
    • Compute-Centric Workloads
    • Data-Centric Workloads
  • table 3 STORAGE-CLASS MEMORY V/S DISK MEMORY REQUIREMENT FORECAST IN 2020
  • SMART AIRBAGS
  • Radiation-hardened memory applications
  • RADIO-FREQUENCY IDENTIFICATION (RFID)
  • Smart mobile phones
  • Printed memory platforms
  • Embedded memory
    • Embedded memory (continued)
  • figure 12 EMERGING MEMORY MANUFACTURING TECHNOLOGY AND CONVENTIONAL CMOS TECHNOLOGY
    • Organic Switching Materials

Industry STRUCTURE AND MARKETS

  • table 4 non-volatile Emerging memories MANUFACTURERS, MATERIAL SUPPLIERS, end Users and SYSTEM INTEGRATORS
    • PartnershipS and consolidationS
  • table 5 acquisitions, mergers and partnerships in emerging non-volatile memories
    • price structure
  • TABLE 6 CommercialLY available non-volatile emerging memory chips in 2010

global MARKET and regional shares

Market According to Applications

  • table 7 Global market for emerging nvram products by application through 2015
  • Figure 13 Global market for emerging NVRAM products by application through 2015
    • Market by Technology
  • table 8 GLOBAL MARKET for EMERGING NVRAM PRODUCTS BY TECHNOLOGIES ADOPTED THROUGH 2015
  • figure 14 GLOBAL MARKET for EMERGING NVRAM PRODUCTS BY TECHNOLOGIES ADOPTED IN 2010
    • REGIONAL MARKETS
  • table 9 GLOBAL MARKET FOR EMERGING NVRAM PRODUCTS BY region THROUGH 2015
  • figure 15 GLOBAL MARKET FOR EMERGING NVRAM PRODUCTS BY REGION THROUGH 2015

Patents and Patent Analysis

  • LIST OF PATENTS
    • PHASE CHANGE RANDOM ACCESS MEMORY DEVICES AND METHODS OF OPERATING THE SAME
    • METHODS FOR FABRICATING PHASE CHANGEABLE MEMORY DEVICES
    • PHASE CHANGE DEVICE HAVING TWO OR MORE SUBSTANTIAL AMORPHOUS REGIONS IN HIGH RESISTANCE STATE
    • NON-VOLATILE MEMORY INCLUDING SUB-CELL ARRAY AND METHOD OF WRITING DATA THERETO
    • MEMORY CELL DEVICE AND PROGRAMMING METHODS
    • PHASE CHANGE RANDOM ACCESS MEMORY DEVICE AND RELATED METHODS OF OPERATION
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    • MULTI-LEVEL CELL RESISTANCE RANDOM ACCESS MEMORY WITH METAL OXIDES
    • MEMORY CELL WITH MEMORY MATERIAL INSULATION AND MANUFACTURING METHOD
    • MULTI-LEVEL MEMORY CELL HAVING PHASE CHANGE ELEMENT AND ASYMMETRICAL THERMAL BOUNDARY
    • MULTILAYER STORAGE CLASS MEMORY USING EXTERNALLY HEATED PHASE CHANGE MATERIAL
    • MAGNETIC RAM
    • PHASE CHANGE MEMORY CELL AND MANUFACTURING METHOD
    • VACUUM-JACKETED ELECTRODE FOR PHASE CHANGE MEMORY ELEMENT
    • METHOD FOR MAKING A KEYHOLE OPENING DURING THE MANUFACTURE OF A MEMORY CELL
    • PHASE CHANGE RANDOM ACCESS MEMORY DEVICE
    • Method for reading non-volatile ferroelectric capacitor memory cell
    • RESISTANCE MEMORY ELEMENT AND NONVOLATILE SEMICONDUCTOR MEMORY
    • RESISTANCE MEMORY ELEMENT AND NONVOLATILE SEMICONDUCTOR MEMORY
    • METHOD TO IMPROVE FERROELECTRONIC MEMORY PERFORMANCE AND RELIABILITY
    • MULTI-PORT PHASE CHANGE RANDOM ACCESS MEMORY CELL AND MULTI-PORT PHASE CHANGE RANDOM ACCESS MEMORY DEVICE INCLUDING THE SAME
    • MEMORY CELL HAVING A SIDE ELECTRODE CONTACT
    • MAGNETIC MEMORIES UTILIZING A MAGNETIC ELEMENT HAVING AN ENGINEERED FREE LAYER
    • PROGRAMMABLE LOGIC DEVICE STRUCTURE USING THIRD DIMENSIONAL MEMORY
    • 2T/2C FERROELECTRIC RANDOM ACCESS MEMORY WITH COMPLEMENTARY BIT-LINE LOADS
    • NON-VOLATILE FERROELECTRIC MEMORY
    • FIELD PROGRAMMABLE GATE ARRAYS USING RESISTIVITY SENSITIVE MEMORIES
    • BUFFERING SYSTEMS FOR ACCESSING MULTIPLE LAYERS OF MEMORY IN INTEGRATED CIRCUITS
    • PHASE CHANGE MEMORY CELL HAVING INTERFACE STRUCTURES WITH ESSENTIALLY EQUAL THERMAL IMPEDANCES AND MANUFACTURING METHODS
    • THIN-FILM FUSE PHASE CHANGE CELL WITH THERMAL ISOLATION PAD AND MANUFACTURING METHOD
    • METHOD OF WRITING INTO SEMICONDUCTOR MEMORY DEVICE
    • PHASE CHANGE MEMORY CELL IN VIA ARRAY WITH SELF-ALIGNED, SELF-CONVERGED BOTTOM ELECTRODE AND METHOD FOR MANUFACTURING
    • THERMALLY INSULATED PHASE CHANGE MEMORY MANUFACTURING METHOD
    • Phase change random access memory (PRAM) device
    • PHASE CHANGE MEMORY DYNAMIC RESISTANCE TEST AND MANUFACTURING METHODS
    • METHOD FOR MAKING A SELF-CONVERGED VOID AND BOTTOM ELECTRODE FOR MEMORY CELL
    • I-SHAPED PHASE CHANGE MEMORY CELL
    • MULTI-RESISTIVE STATE MEMORY DEVICE WITH CONDUCTIVE OXIDE ELECTRODES
    • PLANAR THIRD DIMENSIONAL MEMORY WITH MULTI-PORT ACCESS
    • PHASE CHANGE RANDOM ACCESS MEMORY DEVICE
    • MAGNETORESISTIVE RANDOM ACCESS MEMORY AND ITS WRITE CONTROL METHOD
    • METHODS AND SYSTEMS FOR ACCESSING MEMORY
    • SPACE AND PROCESS EFFICIENT MRAM AND METHOD
    • OPTIMIZED PHASE CHANGE WRITE METHOD
    • PHASE-CHANGE RANDOM ACCESS MEMORY AND PROGRAMMING METHOD
    • MEMORY DEVICE, IN PARTICULAR PHASE CHANGE RANDOM ACCESS MEMORY DEVICE WITH TRANSISTOR, AND METHOD FOR FABRICATING A MEMORY DEVICE
    • MEMORY POWER MANAGEMENT
    • MULTI-STEP SELECTIVE ETCHING FOR CROSS-POINT MEMORY
    • RESISTIVE RANDOM ACCESS MEMORY DEVICE
    • MEMORY CELL DEVICE WITH COPLANAR ELECTRODE SURFACE AND METHOD
    • PROGRAMMABLE RESISTIVE MEMORY CELL WITH SELF-FORMING GAP
    • BRIDGE RESISTANCE RANDOM ACCESS MEMORY DEVICE WITH A SINGULAR CONTACT STRUCTURE
    • SIDE WALL ACTIVE PIN MEMORY AND MANUFACTURING METHOD
    • MEMORY ARCHITECTURE AND CELL DESIGN EMPLOYING TWO ACCESS TRANSISTORS
    • MANUFACTURING METHOD FOR PHASE CHANGE RAM WITH ELECTRODE LAYER PROCESS
    • Memory cell device and manufacturing method
    • THIN-FILM FUSE PHASE CHANGE CELL WITH THERMAL ISOLATION LAYER AND MANUFACTURING METHOD
    • METHODS AND APPARATUS FOR A DUAL-METAL MAGNETIC SHIELD STRUCTURE
    • PROGRAMMABLE RESISTIVE RAM AND MANUFACTURING METHOD
    • MEMORY EMULATION USING RESISTIVITY-SENSITIVE MEMORY
    • METHODS OF OPERATING A BI-STABLE RESISTANCE RANDOM ACCESS MEMORY WITH MULTIPLE MEMORY LAYERS AND MULTILEVEL MEMORY STATES
    • COMPOSITIONS FOR REMOVAL OF PROCESSING BY-PRODUCTS AND METHOD FOR USING SAME
    • THIN-FILM FUSE PHASE CHANGE RAM AND MANUFACTURING METHOD
    • PHASE CHANGE RANDOM ACCESS MEMORY AND METHOD OF TESTING THE SAME
    • PHASE-CHANGE RANDOM ACCESS MEMORY (PRAM) PERFORMING PROGRAM LOOP OPERATION AND METHOD OF PROGRAMMING THE SAME
    • PHASE CHANGE MATERIALS, PHASE CHANGE RANDOM ACCESS MEMORIES HAVING THE SAME AND METHODS OF OPERATING PHASE CHANGE RANDOM ACCESS MEMORIES
    • PHASE-CHANGE MEMORY DEVICE INCLUDING NANOWIRES AND METHOD OF MANUFACTURING THE SAME
    • MEMORY CELL SIDEWALL CONTACTING SIDE ELECTRODE
    • FERROELECTRIC MEMORY ARRAY FOR IMPLEMENTING A ZERO CANCELLATION SCHEME TO REDUCE PLATELINE VOLTAGE IN FERROELECTRIC MEMORY
    • PROGRAMMABLE RESISTIVE RAM AND MANUFACTURING METHOD
    • METHOD OF CONTROLLING THE RESISTANCE IN A VARIABLE RESISTIVE ELEMENT AND NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
    • MEMORY DEVICE AND MANUFACTURING METHOD
    • PROGRAMMABLE RESISTIVE MEMORY WITH DIODE STRUCTURE
    • PHASE CHANGE RANDOM ACCESS MEMORY
    • MRAM READ BIT WITH ASKEW FIXED LAYER
    • RESISTIVE MEMORY DEVICE
    • SEMICONDUCTOR MEMORY DEVICE
    • SCALEABLE MEMORY SYSTEMS USING THIRD DIMENSION MEMORY
    • MEMORY USING VARIABLE TUNNEL BARRIER WIDTHS
    • TOGGLE MEMORY BURST
    • MAGNETIC TUNNEL JUNCTION WITH ENHANCED MAGNETIC SWITCHING CHARACTERISTICS
    • METHOD TO TIGHTEN SET DISTRIBUTION FOR PCRAM
    • PHASE CHANGE RANDOM ACCESS MEMORY AND RELATED METHODS OF OPERATION
    • DAMASCENE PHASE CHANGE RAM AND MANUFACTURING METHOD
    • METHOD FOR FORMING SELF-ALIGNED THERMAL ISOLATION CELL FOR A VARIABLE RESISTANCE MEMORY ARRAY
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF WRITING INTO THE SAME
    • SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • Conductive memory stack with sidewall
    • METHOD FOR MANUFACTURING A RESISTOR RANDOM ACCESS MEMORY WITH REDUCED ACTIVE AREA AND REDUCED CONTACT AREAS
    • SERIAL MEMORY INTERFACE
    • FERROELECTRIC RANDOM ACCESS MEMORIES (FRAMS) HAVING LOWER ELECTRODES RESPECTIVELY SELF-ALIGNED TO NODE CONDUCTIVE LAYER PATTERNS AND METHODS OF FORMING THE SAME
    • SURFACE TOPOLOGY IMPROVEMENT METHOD FOR PLUG SURFACE AREAS
    • GE PRECURSOR, GST THIN LAYER FORMED USING THE SAME, PHASE-CHANGE MEMORY DEVICE INCLUDING THE GST THIN LAYER, AND METHOD OF MANUFACTURING THE GST THIN LAYER
    • HARDMASK FOR FORMING FERROELECTRIC CAPACITORS IN A SEMICONDUCTOR DEVICE AND METHODS FOR FABRICATING THE SAME
    • CURRENT COMPLIANT SENSING ARCHITECTURE FOR MULTILEVEL PHASE CHANGE MEMORY
    • METHOD FOR MANUFACTURING A NARROW STRUCTURE ON AN INTEGRATED CIRCUIT
    • THIN-FILM PLATE PHASE CHANGE RAM CIRCUIT AND MANUFACTURING METHOD
    • MANUFACTURING METHODS FOR THIN-FILM FUSE PHASE CHANGE RAM
    • METHOD FOR MAKING MEMORY CELL DEVICE
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND DATA WRITING METHOD
    • THERMAL ISOLATION FOR AN ACTIVE-SIDEWALL PHASE CHANGE MEMORY CELL
    • METHOD AND STRUCTURE FOR IMPROVED ALIGNMENT IN MRAM INTEGRATION
    • METHOD FOR SENSING A SIGNAL IN A TWO-TERMINAL MEMORY ARRAY HAVING LEAKAGE CURRENT
    • MEMORY CELL DEVICE WITH CIRCUMFERENTIALLY-EXTENDING MEMORY ELEMENT
    • PHASE CHANGE MATERIALS AND ASSOCIATED MEMORY DEVICES
    • NONVOLATILE MEMORY WITH DATA CLEARING FUNCTIONALITY
    • PHASE-CHANGE RANDOM ACCESS MEMORY EMPLOYING READ BEFORE WRITE FOR RESISTANCE STABILIZATION
    • MEMORY DEVICES HAVING SHARP-TIPPED PHASE CHANGE LAYER PATTERNS
    • METHOD AND APPARATUS FOR REFRESHING PROGRAMMABLE RESISTIVE MEMORY
    • MEMORY CELL WITH SEPARATE READ AND PROGRAM PATHS
    • VACUUM JACKETED ELECTRODE FOR PHASE CHANGE MEMORY ELEMENT
    • FERROELECTRIC RANDOM ACCESS MEMORY DEVICE AND METHOD OF DRIVING THE SAME
    • METHOD FOR MAKING A SELF-CONVERGED MEMORY MATERIAL ELEMENT FOR MEMORY CELL
    • TWO-ELEMENT MAGNETIC MEMORY CELL
    • Method for production of MRAM elements
    • Thermally insulated phase change memory device
    • MULTI-STATE MAGNETORESISTANCE RANDOM ACCESS CELL WITH IMPROVED MEMORY STORAGE DENSITY
    • MEMORY ELEMENT WITH REDUCED-CURRENT PHASE CHANGE ELEMENT
    • PHASE CHANGE MEMORY CELL AND MANUFACTURING METHOD
    • TWO-TERMINAL MEMORY ARRAY HAVING REFERENCE CELLS
    • PHASE CHANGE RANDOM ACCESS MEMORY (PRAM) DEVICE HAVING VARIABLE DRIVE VOLTAGES
    • VACUUM JACKET FOR PHASE CHANGE MEMORY ELEMENT
    • PHASE CHANGE MEMORY DEVICE AND MANUFACTURING METHOD
    • SELF-ALIGNED STRUCTURE AND METHOD FOR CONFINING A MELTING POINT IN A RESISTOR RANDOM ACCESS MEMORY
    • WRITE DRIVER CIRCUIT FOR CONTROLLING A WRITE CURRENT APPLIED TO A PHASE CHANGE MEMORY BASED ON AN AMBIENT TEMPERATURE
    • METHOD FOR TWO-CYCLE SENSING IN A TWO-TERMINAL MEMORY ARRAY HAVING LEAKAGE CURRENT
    • CONDUCTIVE MEMORY STACK WITH NON-UNIFORM WIDTH
    • PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND METHOD OF OPERATING THE SAME
    • METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR STEPPED RESET PROGRAMMING PROCESS ON PROGRAMMABLE RESISTIVE MEMORY CELL
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    • METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR READ BEFORE PROGRAMMING PROCESS ON MULTIPLE PROGRAMMABLE RESISTIVE MEMORY CELL
    • VERTICAL SIDE WALL ACTIVE PIN STRUCTURES IN A PHASE CHANGE MEMORY AND MANUFACTURING METHODS
    • SINGLE-MASK PHASE CHANGE MEMORY ELEMENT
    • SELF-ALIGNED MANUFACTURING METHOD, AND MANUFACTURING METHOD FOR THIN-FILM FUSE PHASE CHANGE RAM
    • FERROELECTRIC RANDOM ACCESS MEMOry
    • PHASE CHANGE MEMORY HAVING MULTILAYER THERMAL INSULATION
    • SPACER ELECTRODE SMALL PIN PHASE CHANGE MEMORY RAM AND MANUFACTURING METHOD
    • SEMICONDUCTOR STORAGE DEVICE
    • MEMORY WRITE CIRCUIT
    • RESISTANCE RANDOM ACCESS MEMORY DEVICES AND METHOD OF FABRICATION
    • CONDUCTIVE MEMORY DEVICE WITH CONDUCTIVE OXIDE ELECTRODES
    • MAGNETIC DEVICES AND TECHNIQUES FOR FORMATION THEREOF
    • RESISTIVE MEMORY DEVICE
    • PIPE SHAPED PHASE CHANGE MEMORY
    • MULTI-RESISTIVE STATE ELEMENT WITH REACTIVE METAL
    • THERMALLY CONTAINED/INSULATED PHASE CHANGE MEMORY DEVICE AND METHOD (COMBINED)
    • METHODS OF OPERATING A BISTABLE RESISTANCE RANDOM ACCESS MEMORY WITH MULTIPLE MEMORY LAYERS AND MULTILEVEL MEMORY STATES
    • SPACER CHALCOGENIDE MEMORY DEVICE
    • TWO-TERMINAL MEMORY ARRAY HAVING REFERENCE CELLS
    • METHOD OF MAKING THREE-DIMENSIONAL, 2R MEMORY HAVING A 4F2 CELL SIZE RRAM
    • SENSING A SIGNAL IN A TWO-TERMINAL MEMORY ARRAY HAVING LEAKAGE CURRENT
    • SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • FERROELECTRIC RANDOM ACCESS MEMORY CIRCUITS FOR GUARDING AGAINST OPERATION WITH OUT-OF-RANGE VOLTAGES AND METHODS OF OPERATING SAME
    • FERROELECTRIC RANDOM ACCESS MEMORIES (FRAMS) HAVING LOWER ELECTRODES RESPECTIVELY SELF-ALIGNED TO NODE CONDUCTIVE LAYER PATTERNS AND METHODS OF FORMING THE SAME
    • TWO-CYCLE SENSING IN A TWO-TERMINAL MEMORY ARRAY HAVING LEAKAGE CURRENT
    • FERROELECTRIC RANDOM ACCESS MEMORY CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
    • STRAIN CONTROL OF EPITAXIAL OXIDE FILMS USING VIRTUAL SUBSTRATES
    • SEPARATE WRITE AND READ ACCESS ARCHITECTURE FOR A MAGNETIC TUNNEL JUNCTION
    • FERROELECTRIC CAPACITOR WITH PARALLEL RESISTANCE FOR FERROELECTRIC MEMORY
    • APPARATUS FOR PULSE TESTING A MRAM DEVICE AND METHOD THEREFORE
    • ENHANCED FUNCTIONALITY IN A TWO-TERMINAL MEMORY ARRAY
    • LOW POWER MAGNETORESISTIVE RANDOM ACCESS MEMORY ELEMENTS
    • STORAGE CONTROLLER FOR MULTIPLE CONFIGURATIONS OF VERTICAL MEMORY
    • RESISTIVE MEMORY DEVICE WITH A TREATED INTERFACE
    • PROVIDING A REFERENCE VOLTAGE TO A CROSS POINT MEMORY ARRAY
    • INITIALIZING PHASE CHANGE MEMORIES
    • PHASE CHANGE RANDOM ACCESS MEMORY, BOOSTING CHARGE PUMP AND METHOD OF GENERATING WRITE DRIVING VOLTAGE
    • THIN-FILM FUSE PHASE CHANGE RAM AND MANUFACTURING METHOD
    • CONTROL OF SET/RESET PULSE IN RESPONSE TO PERIPHERAL TEMPERATURE IN PRAM DEVICE
    • FERROELECTRIC MEMORY DEVICES HAVING A PLATE LINE CONTROL CIRCUIT
    • LASER ANNEALING OF COMPLEX METAL OXIDES (CMO) MEMORY MATERIALS FOR NON-VOLATILE MEMORY INTEGRATED CIRCUITS
    • READ BIAS SCHEME FOR PHASE CHANGE MEMORIES
    • FERROELECTRIC MEMORY WITH WIDE OPERATING VOLTAGE AND MULTI-BIT STORAGE PER CELL
    • CIRCUITS FOR DRIVING FRAM
    • FERROELECTRIC RANDOM ACCESS MEMORY
    • INTEGRATED CIRCUIT HAVING A RESISTIVE MEMORY
    • SERIAL TRANSISTOR-CELL ARRAY ARCHITECTURE
    • PHASE CHANGE RANDOM ACCESS MEMORY DEVICE HAVING VARIABLE DRIVE VOLTAGE CIRCUIT
    • CHAIN FERROELECTRIC RANDOM ACCESS MEMORY (CFRAM) HAVING AN INTRINSIC TRANSISTOR CONNECTED IN PARALLEL WITH A FERROELECTRIC CAPACITOR
    • MAGNETIC FILM STRUCTURE USING SPIN CHARGE, A METHOD OF MANUFACTURING THE SAME, A SEMICONDUCTOR DEVICE HAVING THE SAME, AND A METHOD OF OPERATING THE SEMICONDUCTOR DEVICE
    • SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • FERROELECTRIC RANDOM ACCESS MEMORY DEVICE
    • MAGNETO-RESISTIVE RANDOM ACCESS MEMORY SIMULATION
    • PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
    • MRAM READ SEQUENCE USING CANTED BIT MAGNETIZATION
    • NONVOLATILE MEMORY SYSTEM USING MAGNETO-RESISTIVE RANDOM ACCESS MEMORY (MRAM)
    • THIN-FILM PLATE PHASE CHANGE RAM CIRCUIT AND MANUFACTURING METHOD
    • CROSS-POINT RRAM MEMORY ARRAY HAVING LOW BIT LINE CROSSTALK
    • DRIVING METHOD OF VARIABLE RESISTANCE ELEMENT AND MEMORY DEVICE
    • TWO-TERMINAL MEMORY ARRAY HAVING REFERENCE CELLS
    • CROSS-POINT MEMORY ARRAY WITH FAST ACCESS TIME
    • PHASE CHANGE RANDOM ACCESS MEMORY (PRAM) DEVICE
    • MAGNETIC ELEMENT UTILIZING SPIN-TRANSFER AND HALF-METALS AND AN MRAM DEVICE USING THE MAGNETIC ELEMENT
    • SYNTHETIC ANTIFERROMAGNET STRUCTURES FOR USE IN MTJS IN MRAM TECHNOLOGY
    • FERROELECTRIC CAPACITOR STACK ETCH CLEANING METHODS
    • METHOD FOR MANUFACTURING MAGNETO-RESISTIVE RANDOM ACCESS MEMORY
    • FERROELECTRIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR DRIVING THE SAME
    • SELF-ALIGNED SMALL CONTACT PHASE-CHANGE MEMORY METHOD AND DEVICE
    • SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    • METHOD OF PATTERNING A MAGNETIC TUNNEL JUNCTION STACK FOR A MAGNETO-RESISTIVE RANDOM ACCESS MEMORY
    • CHEMICAL MECHANICAL POLISH OF PCMO THIN-FILMS FOR RRAM APPLICATIONS
    • MRAM MEMORY WITH RESIDUAL WRITE FIELD RESET
    • MAGNETO-RESISTIVE RANDOM ACCESS MEMORY AND DRIVING METHOD THEREOF
    • PLATELINE VOLTAGE PULSING TO REDUCE STORAGE NODE DISTURBANCE IN FERROELECTRIC MEMORY
    • SEMICONDUCTOR MEMORY DEVICE HAVING REDUNDANCY CELL ARRAY SHARED BY A PLURALITY OF MEMORY CELL ARRAYS
    • METHOD FOR PRODUCTION OF MRAM ELEMENTS
    • CONDUCTIVE MEMORY STACK WITH SIDEWALL
    • MAGNETIC SWITCHING WITH EXPANDED HARD-AXIS MAGNETIZATION VOLUME AT MAGNETO-RESISTIVE BIT ENDS
    • METHOD AND SYSTEM FOR PROVIDING CURRENT BALANCED WRITING FOR MEMORY CELLS AND MAGNETIC DEVICES
    • FERROELECTRIC CAPACITOR HYDROGEN BARRIERS AND METHODS FOR FABRICATING THE SAME
    • ETCH-STOP MATERIAL FOR IMPROVED MANUFACTURE OF MAGNETIC DEVICES
    • BIT END DESIGN FOR PSEUDO SPIN VALVE (PSV) DEVICES
    • FERROELECTRIC CAPACITOR WITH PARALLEL RESISTANCE FOR FERROELECTRIC MEMORY
    • ONE-MASK PT/PCMO/PT STACK ETCHING PROCESS FOR RRAM APPLICATIONS
    • MAGNETO-RESISTIVE RANDOM ACCESS MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
    • DEVICE AND METHOD FOR GENERATING REFERENCE VOLTAGE IN FERROELECTRIC RANDOM ACCESS MEMORY (FRAM)
    • SEMICONDUCTOR MEMORY DEVICE AND METHOD OF READING DATA
    • LINE DRIVER THAT FITS WITHIN A SPECIFIED LINE PITCH
    • METHOD OF SUBSTRATE SURFACE TREATMENT FOR RRAM THIN-FILM DEPOSITION
    • TRIPLE PULSE METHOD FOR MRAM TOGGLE BIT CHARACTERIZATION
    • FERROELECTRIC CAPACITOR HAVING A SUBSTANTIALLY PLANAR DIELECTRIC LAYER AND A METHOD OF MANUFACTURE THEREFOR
    • MRAM ARCHITECTURE WITH ELECTRICALLY ISOLATED READ AND WRITE CIRCUITRY
    • MEMORY ARRAY OF A NON-VOLATILE RAM
    • PROVIDING A REFERENCE VOLTAGE TO A CROSS POINT MEMORY ARRAY
    • FERROELECTRIC CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
    • SERIAL TRANSISTOR-CELL ARRAY ARCHITECTURE
    • METHODS FOR FABRICATING A MAGNETIC KEEPER FOR A MEMORY DEVICE
    • METHOD AND APPARATUS TO REDUCE STORAGE NODE DISTURBANCE IN FERROELECTRIC MEMORY
    • MAGNETO-RESISTIVE RANDOM ACCESS MEMORY DEVICE STRUCTURES AND METHODS FOR FABRICATING THE SAME
    • NON-VOLATILE MEMORY WITH A SINGLE TRANSISTOR AND RESISTIVE MEMORY ELEMENT
    • REFERENCE VOLTAGE GENERATING APPARATUS FOR USE IN A FERROELECTRIC RANDOM ACCESS MEMORY (FRAM) AND A DRIVING METHOD THEREFOR Patent No.:
    • ARCHITECTURES FOR CPP RING SHAPED (RS) DEVICES
    • CONDUCTIVE MEMORY ARRAY HAVING PAGE MODE AND BURST MODE WRITE CAPABILITY
    • RE-WRITABLE MEMORY WITH MULTIPLE MEMORY LAYERS
    • MULTI-STATE MAGNETO-RESISTANCE RANDOM ACCESS CELL WITH IMPROVED MEMORY STORAGE DENSITY
    • FERROELECTRIC MEMORY DEVICE
    • SPIN BARRIER ENHANCED MAGNETO-RESISTANCE EFFECT ELEMENT AND MAGNETIC MEMORY USING THE SAME
    • MULTI-RESISTIVE STATE ELEMENT WITH REACTIVE METAL
    • LAYOUT OF DRIVER SETS IN A CROSS-POINT MEMORY ARRAY
    • CIRCUIT AND METHOD FOR REDUCING FATIGUE IN FERROELECTRIC MEMORIES
    • METHOD AND APPARATUS FOR SIMULATING A MAGNETO-RESISTIVE RANDOM ACCESS MEMORY (MRAM)
    • TWO-TERMINAL MEMORY ARRAY HAVING REFERENCE CELLS
    • FERROELECTRIC RANDOM ACCESS MEMORY DEVICE AND CONTROL METHOD THEREOF
    • MULTI-RESISTIVE STATE MATERIAL THAT USES DOPANTS
    • CONDUCTIVE MEMORY DEVICE WITH CONDUCTIVE OXIDE ELECTRODES
    • PCMO THIN-FILM WITH RESISTANCE RANDOM ACCESS MEMORY (RRAM) CHARACTERISTICS
    • SEMICONDUCTOR STORAGE DEVICE
    • PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
    • LOW TEMPERATURE DEPOSITION OF COMPLEX METAL OXIDES (CMO) MEMORY MATERIALS FOR NON-VOLATILE MEMORY INTEGRATED CIRCUITS
    • NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
    • SEMICONDUCTOR MEMORY DEVICE
    • FERROELECTRIC MEMORY WITH AN INTRINSIC ACCESS TRANSISTOR COUPLED TO A CAPACITOR
    • ADAPTIVE PROGRAMMING TECHNIQUE FOR A RE-WRITABLE CONDUCTIVE MEMORY DEVICE
    • CROSS-POINT MEMORY ARCHITECTURE WITH IMPROVED SELECTIVITY
    • METHOD FOR FABRICATING FERROELECTRIC RANDOM ACCESS MEMORY DEVICE
    • BIAS-ADJUSTED MAGNETO-RESISTIVE DEVICES FOR MAGNETIC RANDOM ACCESS MEMORY (MRAM) APPLICATIONS
    • MEMORY ARRAY WITH HIGH TEMPERATURE WIRING
    • SPACER CHALCOGENIDE MEMORY METHOD
    • METHOD OF AFFECTING RRAM CHARACTERISTICS BY DOPING PCMO THIN-FILms
    • MRAM DEVICE INTEGRATED WITH OTHER TYPES OF CIRCUITRY
    • EPIR DEVICE AND SEMICONDUCTOR DEVICES UTILIZING THE SAME
    • TUNNELING ANISOTROPIC MAGNETO-RESISTIVE DEVICE AND METHOD OF OPERATION
    • PSEUDO TUNNEL JUNCTION
    • TERMINAL TRAPPED CHARGE MEMORY DEVICE WITH VOLTAGE SWITCHABLE MULTI-LEVEL RESISTANCE
    • DISCHARGE OF CONDUCTIVE ARRAY LINES IN FAST MEMORY
    • CROSS-POINT ARRAY USING DISTINCT VOLTAGES
    • LOW SILICON-HYDROGEN SIN LAYER TO INHIBIT HYDROGEN-RELATED DEGRADATION IN SEMICONDUCTOR DEVICES HAVING FERROELECTRIC COMPONENTS
    • COMPOSITIONS FOR REMOVAL OF PROCESSING BY-PRODUCTS AND METHOD FOR USING SAME
    • MAGNETO-RESISTIVE RANDOM ACCESS MEMORY WITH HIGH SELECTIVITY
    • MAGNETO-RESISTIVE RANDOM ACCESS MEMORY
    • LINE DRIVERS THAT USE MINIMAL METAL LAYERS
    • CONDUCTIVE MEMORY STACK WITH NON-UNIFORM WIDTH
    • ZERO CANCELLATION SCHEME TO REDUCE PLATELINE VOLTAGE IN FERROELECTRIC MEMORY
    • 3D RRAM
    • MRAM STORAGE DEVICE
    • METHOD OF FORMING AND USING A HARDMASK FOR FORMING FERROELECTRIC CAPACITORS IN A SEMICONDUCTOR DEVICE
    • HYDROGEN-LESS CVD TIN PROCESS FOR FERAM VIA0 BARRIER APPLICATION
    • NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD THEREOF
    • CROSS-POINT MEMORY ARRAY EXHIBITING A CHARACTERISTIC HYSTERESIS
    • NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, AND PROGRAMMING METHOD AND ERASING METHOD THEREOF
    • SERIES CONNECTED TC UNIT TYPE FERROELECTRIC RAM AND TEST METHOD THEREOF
    • HYDROGEN BARRIER FOR PROTECTING FERROELECTRIC CAPACITORS IN A SEMICONDUCTOR DEVICE AND METHODS FOR FABRICATING THE SAME
    • BRIDGE-TYPE MAGNETIC RANDOM ACCESS MEMORY (MRAM) LATCH
    • METHOD FOR READING A PASSIVE MATRIX-ADDRESSABLE DEVICE AND A DEVICE FOR PERFORMING THE METHOD
    • FERROELECTRIC CAPACITOR HYDROGEN BARRIERS AND METHODS FOR FABRICATING THE SAME
    • PATENT ANALYSIS
  • table 10 NUMBER OF U.S. PATENTS GRANTED TO COMPANIES FOR NON-VOLATILE EMERGING MEMORY TECHNOLOGIES FROM 2006 THROUGH APRIL 2010
  • FIGURE 16 number OF u.s. PATENTS GRANTED to companies for non-volatile emerging memory technologies From 2006 through april 2010
  • International overview of u.s. PATENT Activity in emerging non-volatile random access memory
  • table 11 NUMBER OF U.S. PATENTS GRANTED TO COMPANIES FOR NON-VOLATILE EMERGING MEMORY PRODUCTS BY REGION FROM 2006 THROUGH APRIL 2010

company profiles

  • 4DS, Inc.
  • Adesto Tehnologies
  • ADVANCED MATERIALS INNOVATION CENTER (AMIC)
  • BAE Systems plc
  • Crocus Technology
  • Cypress Semiconductor corporation
  • Elpida Memory, Inc.
  • Everspin Technologies, inc.
  • Fujitsu Components America, Inc.
  • Grandis, Inc.
  • Hewlett-Packard Company
  • Honeywell International Inc.
  • Hynix Semiconductor America Inc.
  • INternational business machines (IBM) Corporation
  • IM Flash Technologies, LLC
  • Imec Belgium
  • Infineon Technologies AG
  • Innovative Silicon, Inc.
  • Intel corporation
  • Macronix International Co., ltd.
  • Matsushita Electric industrial Corporation (Panasonic)
  • Micromem Technologies Inc.
  • Micron Technology, Inc.
  • MOSYS, INC
  • Netrino, LLC
  • Nantero, Inc.
  • Numonyx
  • NVE Corporation
  • Ovonyx, Inc.
  • Qs Semiconductor Corp.
  • Ramtron international corporation
  • Renesas ELECTRONICS CORPORATION (Hitachi)
  • SAMSUNG Semiconductor
  • Sharp Laboratories of America
  • ST Microelectronics
  • Symetrix Corporation
  • Texas Instruments Inc.
  • Thin Film Electronics AB
  • TOSHIBA
  • Unity Semiconductor Corporation
  • Unity Semiconductor Corporation (continued)

Annexure A

  • Explanations of terminologies applicable to conventional non-volatile random access memory (RAM)
    • PROm
    • EPROM
    • EEPROM
    • DRAM
      • DRAM Issues
    • SRAM
    • NVSRAM
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