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主なNAND型フラッシュメモリーの設計における知的財産権

Key NAND Flash Memory Design Intellectual Property

発行 Forward Insights
出版日 2009年07月 商品コード 91536
ページ情報 英文 152 Pages
価格
US$ 9,999 換算 ¥ 804,619 (税抜) PDF by Email (Local License)
US$ 11,499 換算 ¥ 925,324 (税抜) PDF by Email (Global License)


原文目次

Abstract

Technical innovations, particularly in NAND flash memory design are key enablers of multi-level cell NAND flash memories, especially 3-bit per cell and 4-bit per cell technologies. This report identifies important intellectual property related to sensing architectures, source voltage noise compensation, programming algorithms, disturbs reduction, temperature compensation, high voltage switch, coding schemes and error correction codes from Hynix, Micron, Samsung, SanDisk, STMicroelectronics and Toshiba.

Table of Contents

  • Contents
  • List of Figures
  • Methodology
  • Issues Inherent in Multi-state NAND Flash Memory
  • Key NAND Flash Intellectual Property
    • Sensing Architecture for Multi-state Memories
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
    • Source Voltage Noise Compensation
      • US Patent Application No.
      • U.S. Patent No.
    • Coarse and Fine Programming
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
    • Sequential page programming
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
    • Floating Gate-Floating Gate Noise Coupling Reduction and Background Pattern Dependency
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent Application No.
      • U.S. Patent Application No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
    • Sensing and Page Buffer Improvements
      • U.S. Patent No.
      • U.S. Patent No.
    • Negative Threshold Sensing
      • U.S. Patent No.
      • U.S. Patent No.
    • Program Disturb
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent Application No.
      • U.S. Patent Application No.
    • Temperature Compensation
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
    • High Voltage Switch
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
    • Charge Pumps
      • U.S. Patent No.
      • U.S. Patent No.
      • U.S. Patent No.
    • Coding Schemes and Error Correction Codes
      • U.S. Patent No.
      • U.S. Patent Application No.
      • U.S. Patent Application No.
      • U.S. Patent Application No.
      • U.S. Patent No.
      • U.S. Patent Application No.
      • U.S. Patent No.
      • U.S. Patent No. .156
      • U.S. Patent Application No.
  • References
  • About the Author
  • About Forward Insights
    • Services
    • Contact

List of Figures

  • Figure 1
  • Figure 2
  • Figure 3
  • Figure 4
  • Figure 5
  • Figure 6
  • Figure 7
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  • Figure 48
  • Figure 49
  • Figure 50
  • Figure 51
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  • Figure 82
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